发明名称 LOGICAL OPERATION SYSTEM OF PATTERN
摘要 PURPOSE:To perform a logical operation with no limit of input pattern by providing a composite intersecting point processing circuit to an intersecting point detection circuit and an intersecting point memory circuit in order to accept the input of a special position relation where the sides and apexes of two patterns overlap each other. CONSTITUTION:An intersecting point detection circuit 3 connected to an input pattern memory circuit 1 of a pattern logical arithmetic system detects an intersecting point and stores it to an intersecting point memory circuit 4. A composite intersecting point processing circuit 7 is provided to the circuits 3 and 4. When the circuit 3 detects an intersecting point, the circuit 7 processes the intersecting point and decides the inner or outer direction toward an output vector and a pattern area of the remote side based on the direction at a boundary. Based on the result of decision, a logical operation performed by a boundary line tracking circuit 5, and a coordinate value train incerting circuit 2, etc. is defined as an AND or OR operation to obtain a tracking result of boundary line. Then the input is processed for a special position relation where the sides and apexes of two patterns overlap each other. Thus a logical operation is carried out with no limit of an input pattern.
申请公布号 JPS59226968(A) 申请公布日期 1984.12.20
申请号 JP19830103034 申请日期 1983.06.09
申请人 FUJITSU KK 发明人 HIRAOKA NOBUYUKI;KATOU FUMIO
分类号 G06F17/50;G06T3/00;G06T17/00;(IPC1-7):G06F15/20 主分类号 G06F17/50
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