发明名称 CIRCUIT FOR SUPPRESSING DC VARIATION
摘要 PURPOSE:To obtain an automatic gain control circuit which can be operated at high speed by amplifying only signal components after detecting and cancelling a DC variation in a DC variation suppressing circuit of an optical signal receiving circuit having a full AGC circuit of the pilot carrier system. CONSTITUTION:The input, where a DC variation Sd accompanied with gain control is added to a signal component Ss, to a light receiving amplifier REC is amplified in amplifier circuits BA1 and BA2. Only the DC variation Sd is extracted by a low-pass filter LPF2 and has the gain adjusted in a polarity inverting circuit INV to have a level equal to that of the DC variation of the output of the amplifier circuit BA1, thus obtaining a polarity-inverted signal. This signal and the output of the amplifier circuit BA2 are added in an adding circuit MIX to eliminate the DC components. Consequently, since the DC variation is eliminated even if the variation Sd of a reverse bias current is mixed with the signal component Ss, low-band oscillation does not occur, and the highspeed operation is possible.
申请公布号 JPS59226527(A) 申请公布日期 1984.12.19
申请号 JP19830100942 申请日期 1983.06.08
申请人 OKI DENKI KOGYO KK 发明人 URATA HARUSHIGE;UCHIDA YUKIO
分类号 H04B10/293;H04B10/07;H04B10/564;H04B10/572;H04B10/69 主分类号 H04B10/293
代理机构 代理人
主权项
地址
您可能感兴趣的专利