发明名称 METHOD OF FORMING INTEGRATED CIRCUIT STRUCTURES USING INSULATOR DEPOSITION AND INSULATOR GAP FILLING TECHNIQUES
摘要 A method for forming an integrated circuit structure using an insulator deposition and an insulator gap filling technique are provided to improve the uniformity of a surface profile by re-depositing a part of an electrical insulating layer. An electrical insulating layer having a wave-shaped surface profile including at least one peak and at least one valley is deposited on an integrated circuit substrate(34). Parts of the electrical insulating layer from the peat to the valley are re-deposited through a sputter deposition technique using an electrical insulating layer as a sputter target, so that the parts of the electrical insulating layer are thickened(36). The deposition process includes a deposition procedure of the electrical insulating layer on the integrated circuit substrate through a plasma deposition process. The deposition process includes a deposition procedure of a silicon nitride layer using a first plasma that utilizes gas including inert gas, gas containing nitrogen, and gas containing silicon as source gas.
申请公布号 KR20080082443(A) 申请公布日期 2008.09.11
申请号 KR20080014484 申请日期 2008.02.18
申请人 SAMSUNG ELECTRONICS CO., LTD.;INTERNATIONAL BUSINESS MACHINES CORPORATION;INFINEON TECHNOLOGIES AG;CHARTERED SEMICONDUCTOR MANUFACTURING LTD. 发明人 KIM, JUN JUNG;KU, JA HUM;PARK, JAE EON;FANG SUNFEI;GUTMANN ALOIS;KWON, O SUNG;WIDODO JOHNNY;YANG, DAE WON
分类号 H01L21/31;H01L21/203 主分类号 H01L21/31
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