发明名称 DEBUGGING DEVICE
摘要 PURPOSE:To set the optional number of desired conditional breaks by preserving a brake conditional setting table. CONSTITUTION:A multiplexer 7 of a debugging device 1 connects an address bus 16 of a processor 2 and an address input of a selection map memory 8 to bring this memory into the write state. Then, 16 kinds of stop conditions where the numbers of 0-15 are assigned as addresses are set to a break generation condition setting table memory BTM9. Then, the processor 2 interrupts the write signal of a control circuit 12 to bring the selection map memory 8 into the reading state, and also transmits a run signal of a processor 21 of an active machine 20 to a break control circuit 11 to control the execution of the program of the active machine 20. Further, the break generation conditional data is read from the BTM9 by using an identical address to the address of the program memory 22 to transmit the data to a comparison circuit 10.
申请公布号 JPS59202547(A) 申请公布日期 1984.11.16
申请号 JP19830076301 申请日期 1983.05.02
申请人 TATEISHI DENKI KK 发明人 TAKAHASHI YOSHINORI;TAKAGI HARUO
分类号 G06F11/28;G06F11/36 主分类号 G06F11/28
代理机构 代理人
主权项
地址