| 摘要 |
PURPOSE:To constitute a high-speed logic gate by a method wherein a plural number of reverse conductive type transistors (Tr), which form a pair with a normal conductive type transistor, a parallelly connected and the loaded logic gate is obtained in the condition that these reverse conductive type Trs have been maintained in an ON state at all times. CONSTITUTION:An input terminal IN1 has been connected to the gate electrode of an N channel MOS Tr1 and an input terminal IN2 has been connected to the gate electrode of an N channel MOS Tr2. The source electrodes of the both Trs are connected to Vss, the drain electrodes thereof become an output terminal OUT and two input NOR gates according to a parallel connection are formed. P channel Trs, Tr3 and Tr4, have been parallelly connected in the fundamental cell, and the drain electrodes of the both Trs are connected to Vdd and the source electrodes thereof are connected to the drains of the Tr1 and the Tr2. Furthermore, the Vss has been impressed to the gate electrodes of the Tr3 and the Tr4. The Tr3 and the Tr4 only function as a load and moreover the both Trs, the Tr3 and the Tr4, have been in an ON state at all times. |
