发明名称 SEMICONDUCTOR INTEGRATED CIRCUIT
摘要 <p>: A semiconductor integrated circuit for use as a highly dense memory comprises a first circuit receptive to a first power source voltage for generating a predetermined second power source voltage lower than the first power source voltage. There is also a second circuit receptive to the first power source voltage for generating a second pulse signal for use with the second power source voltage in response to a first pulse signal that varies within the same voltage range as that of the first power source voltage. A third circuit receptive to the second power source voltage and responsive to the second pulse signal has circuit elements of smaller size than those of the first circuit. This arrangement enables very dense packing of the elements while avoiding a need to reduce the voltage that can be applied to avoid risk of dielectric breakdown.</p>
申请公布号 CA1173519(A) 申请公布日期 1984.08.28
申请号 CA19820401238 申请日期 1982.04.19
申请人 HITACHI, LTD. 发明人 ITOH, KIYOO;HORI, RYOICHI
分类号 G05F1/46;G11C5/14;G11C11/4074;H01L27/02;(IPC1-7):H03K17/687;H01L27/06 主分类号 G05F1/46
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