发明名称 Composite conductor structure for semiconductor devices
摘要 In a semiconductor integrated circuit device comprising a memory cell array and peripheral circuitry conductive layers are of three-layer construction consisting of a polycrystalline silicon layer (27) a silicide layer (35) of silicon and a refractory metal formed on the polycrystalline silicon layer, and a refractory metal layer (42) formed on the silicide layer. The refractory metal may be molybdenum, titanium, tantalum or tungsten. The peripheral circuitry has interconnecting lines and MISFET gates formed of such conductive layers. <IMAGE>
申请公布号 GB2134706(A) 申请公布日期 1984.08.15
申请号 GB19830031916 申请日期 1983.11.30
申请人 * HITACHI LTD 发明人 OSAMU * KASAHARA;SHINJI * SHIMIZU;HIROYUKI * MIYAZAWA;KENSUKE * NAKATA
分类号 H01L29/78;H01L21/3205;H01L23/52;H01L23/532;H01L27/108;(IPC1-7):01L23/52;01L21/88 主分类号 H01L29/78
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