发明名称 STACK LENGTH DESIGNATING SYSTEM
摘要 PURPOSE:To reduce the burden of a program, by defining a stack length with a data designated by the program at the jump instruction execution and defining a fixed value if the program does not designate with the data and designating the stack length by the program only when it is required. CONSTITUTION:When the control is jumped to a subroutine B by a jump instruction of a main program A, contents of address 400 are read out to a stack length register 2, and a stack length decoder 3 outputs ''no signal'', and contents (64)D of the register 2 are outputted by a selecting circuit 5 and are added to value (700)D of a stack point register 6 by an adding circuit 7, and contents of the register 6 are updated to (764)D. Next, when the control is jumped to a subroutine C, contents (32)D of a fixed data generating circuit 4 are selected in the input of the selecting circuit 5 because contents of address 500 are (0)D, and contents (32)D of the circuit 4 are added to value (764)D of the register 6 by the adding circuit 7, and contents of the register 6 are updated to (796)D.
申请公布号 JPS59117641(A) 申请公布日期 1984.07.07
申请号 JP19820226262 申请日期 1982.12.24
申请人 HITACHI SEISAKUSHO KK;NIPPON DENSHIN DENWA KOSHA;OKI DENKI KOGYO KK;NIPPON DENKI KK;FUJITSU KK 发明人 FURUKAWA KAZUO;YAMADA SHIGEKI;MATSUSHITA MASAYOSHI;SAKATA HIRONOBU;SAKAMOTO YASUHIKO
分类号 G06F9/46;G06F9/42;G06F9/48 主分类号 G06F9/46
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