| 摘要 |
PURPOSE:To obtain an efficient debugging system only by adding a small number of hardwares by using a bit with optional address width or a bit with optional data width for comparison. CONSTITUTION:A command from a console 25 is analysed by an analysing part 24 and supplied to a compare data setting part 22 and a selecting circuit 20. A setected signal from the selecting circuit 20 is supplied to a bit extracting circuit 26. The bit extracting circuits 26, 27 extract effective bits respectively on the basis of the contents of an effective bit position register 31. The outputs of the circuits 26, 27 are inputted to a comparison operation part 23 through registers 28, 29, respectively. The operation part 23 compares the contents of the register 28 with that of the register 29, and at the time of coincidence, a stop signal is outputted to a CPU1 through a control signal line 12 to stop the CPU1. |
