发明名称 MEMORY DEVICE
摘要 PURPOSE:To prevent a refresh discontinuation or the breakdown of memory contents by giving the switch control to the requests separated into access requests given from a bus and refresh requests given from a refresh control circuit respectively with a priority circuit. CONSTITUTION:A memory access request given from a bus via interface circuits 1a and 1b is sent to a priority circuit 6 after the bus is specified by a priority circuit 3. A refresh request given from a refresh circuit 2 is also supplied to the circuit 6, and therefore a read/write mode or a refresh mode is decided for an operation mode of a memory 5. The circuit 3 holds the priority until it finishes all operations; while the circuit 6 holds the priority only during the memory active. Then a memory control circuit 4 drives and performs prescribed operation the memory 5 with the output given from the circuit 6.
申请公布号 JPS59107487(A) 申请公布日期 1984.06.21
申请号 JP19820216568 申请日期 1982.12.10
申请人 MITSUBISHI DENKI KK 发明人 KANBE HIDETOSHI
分类号 G11C11/406;G11C11/34;(IPC1-7):11C11/34 主分类号 G11C11/406
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