| 摘要 |
PURPOSE:To attain the parallel DMA processing without discontinuing the CPU processing by providing a bus control circuit between the internal bus of a board processor and the external bus of a peripheral device and having connection or disconnection between both buses by turning on and off said control circuit. CONSTITUTION:An external bus 7 is connected to a board processor 1, and a memory access interface 8, an external peripheral device 9 and a main memory 10 are connected directly to the bus 7. An internal bus 6 is provided to the processor 1, and a CPU2, a memory 3, an input/output device 4 and a buffer 5 are connected to the bus 6. Then the buffer 5 is connected to the bus 7. The buffer 5 is provided with a transistor-transistor logic TTL circuit and undergoes gate control by the CPU2 as a 3-state buffer. Then the buses 6 and 7 are connected or disconnected to each other to perform the parallel processing without discontinuing the processing of the CPU2. |
