发明名称 MANUFACTURE OF COMPLEMENTARY METALLIC OXIDE SEMICONDUCTOR DEVICE
摘要 PURPOSE:To simplify the manufacturing process for an SOS-CMOS device which prevents the generation of current leakage by utilizing crystallinity modification due to Si ion implantation. CONSTITUTION:An island form Si layer 102 is provided on an insulation substrate 101. Si is ion-implanted into the region except the neighborhood of the boundary of a p type and an n type MOS transistor, heat treatment is performed, and thus the crystallinity of the ion implanted region is modified. Next, gate oxide films 104 (1041, 1042) and gate electrodes 105 (1051, 1052) of each transistor are formed. An n type impurity is ion-implanted into an n-channel MOS forming region with the gate electrode 1051 and a resist 106 as a mask, and a p type impurity into a p-channel MOS forming region with the gate electrode 1052 and a resist 107 as a mask. At this time, an ion implanted depth becomes shallow at the crystallinity modified region. Thereafter, heat treatment is performed, and accordingly the CMOS device wherein a drain region in the neighborhood of the boundary of each transistor is formed deeply is obtained.
申请公布号 JPS5978556(A) 申请公布日期 1984.05.07
申请号 JP19820188618 申请日期 1982.10.27
申请人 TOSHIBA KK 发明人 OONO JIYUNICHI
分类号 H01L27/08;H01L21/02;H01L21/86;H01L27/12;H01L29/78;H01L29/786 主分类号 H01L27/08
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