| 摘要 |
PURPOSE:To obtain a miniature and inexpensive arithmetic processor, by converting a 1-bit processing instruction into a write processing instruction code of a CPU and a word processing instruction into a forcible interruption processing instruction code of the CPU and storing these codes into a control program memory. CONSTITUTION:A CPU11 stores an STA code and an RST code in an instruction storage RAM14 with 1-bit and word processing instructions respectively in response to each step of a sequence program before an operation is performed by a control program written in a control program memory 12. The STA and RST codes indicate a writing instruction and a forcible interruption instruction respectively. Then the writing instruction (STA instruction) of the CPU11 is selected for the 1-bit processing instruction, and the CPU11 starts an arithmetic process through a 1-bit arithmetic circuit 17. While the forcible interruption processing instruction (RST instruction) is executed for the word processing instruction. Then the CPU11 executes a word processing program. |
