| 摘要 |
PURPOSE:To prevent the oscillation of a PN code generating circuit from being stopped, by resetting a shift register by the content stored in a latch circuit even if the content of all bit cells of the shift register goes to zero. CONSTITUTION:An exclusive OR circuit 18 is connected to an input terminal D of a bit cell 11 of the 1st stage of the shift register 10 via an OR circuit 19. Each output terminal Q of bit cells 11-16 of the shift register 10 is connected to the input terminal D of the bit cell of the next stage via OR circuits 21-26. Output terminals Q' of the bit cells 11-17 are connected to the input terminal of an AND circuit 20. Output terminals of the OR circuits 21-26 and the OR circuit 19 are connected to the input terminal D corresponding to latch circuits 31-37, and entirely the same signals as that to the bit cells 11-17 are stored in the latch circuits 31-37. An output terminal of an exclusive OR circuit 38 is connected to an input terminal of an AND circuit 41 and each output terminal Q of the latch circuits is connected to input terminals of AND circuits 42-47 respectively. |
