| 摘要 |
<p>PURPOSE:To enable to produce an arbitrary series signal, by constituting the series signal circuit with the programmable logic array PLA, shift registers and FF and programming PLA. CONSTITUTION:The shift register array determination section 101 produces the input signal to the shift register array based on the state of the circuit internal and the control input from the circuit external. In the shift register array 102, a plurality of shift registers are arranged, which produces the state of circuit internal, based on the output of the determination section 101 and the initial state set signal. The generation series determination section 103 outputs the produced series signal to the external of circuit, based on the control input from the circuit external and the state of circuit internal. The state detection section 104 outputs the timing signal to set the state of the array 102 based on the state of the circuit internal and the control input from the circuit external. The initial state set section 105 generates the initial state signal based on the output signal of the detection section 104 and the initial state. Further, the initial state generation section 106 and the timing generation section 107 are provided.</p> |
