发明名称 ADDRESS ASSIGNMENT SYSTEM
摘要 PURPOSE:To improve considerably the degree of freedom for the allocation of a memory area at designing a system, by providing a comparator which detects the coincidence between the contents of the base address register of a program stroage part and the contents of the high-order part of a program counter. CONSTITUTION:The base address register 3 and the high-order address part 21 of the program counter 2 have the same number of bits, and their contents are sent to and compared by the comparator 4 with each other. Consequently, when they coincide with each other, a coincidence signal 13 is made active and codes out of an ROM1 are outputted to an internal bus 12 through an ROM output buffer 7. When they do not coincide, a data buffer 8 is activated through the operation of an inverter 11 and codes stored in an external memory are fetched to the bus 12. At this time, the buffer is place in a high-impedance state to inhibit transfer from the ROM1 to the code bus 12.
申请公布号 JPS5916059(A) 申请公布日期 1984.01.27
申请号 JP19820123885 申请日期 1982.07.16
申请人 NIPPON DENKI KK 发明人 TANABE TERUMASA
分类号 G06F12/06;G06F9/26;G06F9/445 主分类号 G06F12/06
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