发明名称 JUNCTION TYPE FIELD EFFECT TRANSISTOR
摘要 PURPOSE:To obtain a J type FET wherein two or three dimensional integration can be performed, by epitaxially growing N type AlxGa1-xAs, in which a P<+> layer is embedded, and N type GaAs on an N type GaAs substrate, separating the device by the P<+> layer, and providing an N<+> layer reaching the substrate. CONSTITUTION:On an N type GaAs substrate 11, N type AlxGa1-xAs 12, in which a P<+> layer 14 is embedded by a molecular beam epitaxy method, and N type GaAs 13 are laminated. Then, P<+> separating layers 15 and N<+> source and drains 16 are provided through the layer 12. With the P<+> layer 14 as a gate and the layers 11 and 13 as channels, a J-FET can be formed. An N type AlxGa1-xAs layer 22 is held by N type GaAs layers 21 and 23. J-FETs having three layer structure of said layers, are laminated in multiples stages, and a three dimensional IC can be constituted, with inter layer separation being provided by the N<-> type GaAs 21. In this constitution, the IC with high density can be obtained.
申请公布号 JPS599974(A) 申请公布日期 1984.01.19
申请号 JP19820119451 申请日期 1982.07.08
申请人 MATSUSHITA DENKI SANGYO KK 发明人 TAKAGI HIROMITSU;KANOU KOUTA
分类号 H01L29/80;H01L21/337;H01L21/338;H01L29/778;H01L29/808;H01L29/812;(IPC1-7):01L29/80 主分类号 H01L29/80
代理机构 代理人
主权项
地址