发明名称 FAULT DETECTOR OF TRIPLEX CONTROL PROTECTIVE DEVICE
摘要 PURPOSE:To perform system down recovery by detecting two signals from each of one device and all other devices, and monitoring changes of state of those two signals a specific time after dissidence is detected. CONSTITUTION:For example, when systems B and C are normal and a system A is troubled by an output pulse 1, dissidence detecting gates 10 and 11 detect dissidence and timers 12 and 13 and one-shot circuits 14 and 15 generate outputs with specific-time delay. Further, the output pulse 1 of the system A allows AND gates 16 and 17 and OR gates 30 and 31 to output 1. Once the output pulse of the system B changes from 1 to 0, FFs 22 and 23 are set and inverters 26 and 27 output inverted signals a specific time later; and the pulse 1 is outputted to AND gates 32 and 33 in accordance with the AND condition between the output pulse of OR gates 30 and 31 and the trouble of the system A on the side of the pulse 1 is detected through an OR gate 34. Similarly, trouble detection regarding the system A on the side of an output pulse 0 and other systems is performed.
申请公布号 JPS58205201(A) 申请公布日期 1983.11.30
申请号 JP19820089165 申请日期 1982.05.26
申请人 TOKYO SHIBAURA DENKI KK 发明人 SAKAI TAKAMI;KIWADA MICHIKO;MATSUSHITA TOMOYUKI
分类号 G01R31/00;G05B9/03 主分类号 G01R31/00
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