发明名称 VOLTAGE COMPARATOR
摘要 PURPOSE:To decrease a transmission delay time and power consumption, by providing a transmission delay controlling circuit where a resistance value of a circuit connected to an adjusting terminal of a comparator is made small only before and after the inversion of an output of the comparator. CONSTITUTION:An output terminal of the comparator 1 having the adjusting terminal C is connected to one end of a bidirectional constant current circuit 2 and an input terminal of an inverter 3, and an output termial of the inverter 3 is connected to the other end of the constant current circuit 2 and the inverting input terminal of the comparator 1. The inverting input terminal of the said comparator 1 is grounded via a capacitor 5, and a noninverting input terminal of the comparator 1 is connected to a positive voltage terminal of a reference voltage source 6. A delay time controlling circuit 10 controlling the resultant resistance value of a series circuit of resistors 10 and 11 is inserted between the terminal C of the comparator 1 and ground. In this delay time controlling circuit 10, one end of a resistor 13 is connected to the output terminal of the comparator 1 and the other end is grounded via a capacitor 14 and connected to an input terminal of a buffer amplifier 15, and the output terminal of the buffer amplifier 15 is connected via a series circuit comprising a resistor 16 and a capacitor 17.
申请公布号 JPS58201418(A) 申请公布日期 1983.11.24
申请号 JP19820084427 申请日期 1982.05.19
申请人 YOKOGAWA DENKI SEISAKUSHO KK 发明人 NAKAGAWARA MINORU;AZEGAMI TADASHI
分类号 H03K3/023;H03K3/0233;(IPC1-7):03K3/023 主分类号 H03K3/023
代理机构 代理人
主权项
地址