发明名称 NEGATIVE LOGIC INTERFACE CIRCUIT
摘要 PURPOSE:To realize the prevention of malfunction at the power supply failure very easily, by providing a power supply failure detecting means which is operated with the 2nd power supply output generated from the 2nd power supply unit different from the 1st power supply unit and generates a power failure signal, when the output of a termination resistor and the 2nd power supply is interrupted to a drive signal. CONSTITUTION:The power failure detecting means 14 consists of a resistor, which is the same module resistor as the termination resistor 13. The module resistor is not provided for reception circuits 2', 3', but mounted on a reception circuit 4' only placed at the remotest terminal. It is assumed that a power supply unit 12 is failed, when the drive signal (a) on an interface is an ineffective polarity (high level). Then the drive signal (a) is inverted to a low level (effective polarity) unconditionally. Since a power failure signal (b) is on a low level at the same time regardless of the inversion, reception gate output signals h', i' outputted from reception gates 6', 7' are not the effective polarity.
申请公布号 JPS58195320(A) 申请公布日期 1983.11.14
申请号 JP19820077899 申请日期 1982.05.10
申请人 NIPPON DENKI KK 发明人 FUJIMOTO KIYOSHI
分类号 H03K19/003;H03K17/22;H03K19/007 主分类号 H03K19/003
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