发明名称 TESTING METHOD OF SEMICONDUCTOR MEMORY
摘要 PURPOSE:To obtain an efficient testing method which allows two testing modes in parallel, so as to execute a DC characteristic and operation characteristic test on one side and a data holding test on the other side, by providing plural memory elements. CONSTITUTION:A control part 1 takes the DA characteristic test and operation characteristic test by its program and then stored data for the successive data holding test are written in a semiconductor memory DUT3a. Further, the control part 1 sends out a mode selecting signal SEL a necessary time latter to operate a relay RL2 and thus while the DUT3a is placed in data holding test mode, a DUT3b is placed in data readout mode for the data holding test to check its contents. Then, they are placed in DC characteristic and operation characteristic test modes. After the data holding test of the DUT3a, the control part 1 returns the mode select signal SEL again to release the RL2. The control part 1 places the DUT3a in data readout mode for the data holding test to check the storage contents.
申请公布号 JPS58177598(A) 申请公布日期 1983.10.18
申请号 JP19820059258 申请日期 1982.04.09
申请人 FUJITSU KK 发明人 IGARASHI TAKEMI
分类号 G11C29/00;G11C29/04;G11C29/56 主分类号 G11C29/00
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