发明名称 DETECTING CIRCUIT OF SYNCHRONIZING CODE
摘要 <p>PURPOSE:To attain a simple constitution comprising less number of components, by writing in advance a data correcsponding to plural synchronizing code detecting conditions in a memory and reading out the data with a parallel output from a shift register. CONSTITUTION:An input signal including a synchronizing code is fed to a shift register 2 serially through an input terminal 1. A register 2 applies series-parallel conversion to an input signal series, an obtained signal of parallel type is applied as an address input signal of an ROM13. A data corresponding to the address, i.e., a synchornizing code detecting signal is written in the ROM13 in advance. Further, the synchronizing code detecting signal is read out according to plural synchronizing code detecting conditions written in the ROM13 in response to the ROM13 and extracted externally through output terminals 4a-4c. Thus, the circuit of this constitution is used as a synchronizing code detection circuit corresponding to plural different synchronizing code detecting conditions.</p>
申请公布号 JPS58177058(A) 申请公布日期 1983.10.17
申请号 JP19820060080 申请日期 1982.04.08
申请人 MITSUBISHI DENKI KK 发明人 UMEDA YOSHIAKI
分类号 H04L7/08;H04L7/04 主分类号 H04L7/08
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