发明名称 Complementary logic circuit.
摘要 <p>A logic circuit having n inputs for accepting n binary inputs (X, Y) and having an output terminal for providing as an output a predetermined logical binary function (B) of said n inputs. &lt;??&gt;The logic circuit comprises n transistors (11, 12) of a first conductivity type, the bases of which form the inputs, an n + 1 transistor (2) of said first conductivity type, and an n + 2 transistor (1) of the second conductivity type. &lt;??&gt;The collectors of said n transistors (11, 12) and the emitter of said n + 2 transistor (1) are connected. &lt;??&gt;The emitters of said n transistors and the emitter of said n + 1 transistor (2) are connected. &lt;??&gt;A first resistor (3) is connected between the emitter of said n + 2 transistor (1) and a first source of potential. &lt;??&gt;A second resistor (4) is connected between the collector of said n + 1 transistor (2) and said first source of potential. &lt;??&gt;A third resistor (5) is connected between the emitter of said n + 1 transistor (2) and a third source of potential. &lt;??&gt;The collector of said n + 2 transistor (1) is connected to said third source of potential. &lt;??&gt;The base of said n + 1 transistor (2) and the base of the n + 2 transistor (1) are fed in common to a second source of potential. &lt;??&gt;The collector of said n + 1 transistor (3) forms the output of the circuit. </p>
申请公布号 EP0090186(A2) 申请公布日期 1983.10.05
申请号 EP19830101932 申请日期 1983.02.28
申请人 INTERNATIONAL BUSINESS MACHINES CORPORATION 发明人 MONTEGARI, FRANK ALFRED
分类号 G11C11/413;G11C8/10;H03K19/082;H03K19/084;H03K19/086;H03K19/21;H03M7/00;(IPC1-7):03K19/082 主分类号 G11C11/413
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