| 摘要 |
<p>PURPOSE:To obtain protection conforming with a use purpose of a synchronizing signal, by obtaining an information detecting synchronizing signal which exactly coincides with a frame synchronizing signal even if lack is generated, and an error correcting synchronizing signal which generates no lack even if a shift of several bits is generated. CONSTITUTION:When an erroneous frame synchronizing signal FS is generated from a synchronization detecting circuit 1, this FS signal does not coincide with an information detecting synchronizing signal C generated from the first counter 2, therefore, no coincidence signal is generated from a coincidence detecting circuit 4, and the second counter 7 is not cleared. Accordingly, the erroneous FS signal is eliminated exactly. On the other hand, the third counter 10 is delayed by 1 bit clock against the first counter 2 and is operated synchronously, and even if the information detecting synchronizing signal C generated from the counter 2 lacks and reset is not provided, an error correcting synchronizing signal K is generated exactly without having a largep hase shift, since a bit clock BK is counted.</p> |
