发明名称 |
An integrated logic circuit. |
摘要 |
<p>In an integrated logic circuit employing normally-off type FET's, it is difficult, but desirable to realize a NAND gate due to unwanted flow of the forward current to the next stage.</p><p>In accordance with the invention, a stable NAND gate operation can be realized by introducing a NOR gate (30) into all gate electrodes (IN1) of the inputs of the NAND gate, except one gate electrode (IN2) thereof of which source is grounded.</p> |
申请公布号 |
EP0083181(A2) |
申请公布日期 |
1983.07.06 |
申请号 |
EP19820306768 |
申请日期 |
1982.12.17 |
申请人 |
TOKYO SHIBAURA DENKI KABUSHIKI KAISHA |
发明人 |
TOYODA, NOBUYUKI;HOJO, AKIMICHI |
分类号 |
H01L27/08;H01L21/8232;H01L27/06;H03K19/094;H03K19/0952;(IPC1-7):03K19/094 |
主分类号 |
H01L27/08 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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