发明名称 PRIORITY CONTROLLING SYSTEM FOR USING RIGHT OF COMMON BUS
摘要 PURPOSE:To prevent the multiplex use of a common bus even though an error occurs in the bus use request code, by showing the number of logics 1 of the bus use request code in the form of the bit position to use it to a checking code. CONSTITUTION:The bus use requesting circuit of each master card 10 contains the 2nd code setting plate 73A for setting the check codes BRC2, BRC1 and BRC0 and leads the bus use OK signal BOK given from a common card to an AND gate A3 via an NOT circuit N8. Thus it is possible to cancel the signal BOK. In other words, the bus use requesting circuit transmits the combination of the bus use request codes BRQ3-BRQ0 and the check codes. As a result, a checking circuit of the common card inspects each code to check the multiplex use of the bus. Thus the signal BOK is inverted when the multiplex use is detected for the bus to cancel the bus use permission to the master card.
申请公布号 JPS5897728(A) 申请公布日期 1983.06.10
申请号 JP19810195670 申请日期 1981.12.07
申请人 FUJI DENKI SEIZO KK;FUJI FUAKOMU SEIGIYO KK 发明人 CHIBA YOSHIHIRO
分类号 G06F9/46;G06F13/374;G06F13/376 主分类号 G06F9/46
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