发明名称 DIGITAL SWEEP SIGNAL GENERATOR
摘要 <p>PURPOSE:To decrease the memory capacity even when a sweep frequency is generated, by providing a phase calculating circuit. CONSTITUTION:Signals for one period's share determined with a frequency of a signal to be generated and a clock frequency are stored in a memory 3 in a form corresponding to a time series of sampling. A phase calculating circuit 2 makes operation every time when a clock signal from a clock signal source 1 is inputted, and a data in the memory 3 is read out. Thus, a sinusoidal wave which changes continuously with a constant clock frequency can be generated.</p>
申请公布号 JPS5888905(A) 申请公布日期 1983.05.27
申请号 JP19810186955 申请日期 1981.11.24
申请人 SONY KK 发明人 TADAMI MITSUSHIGE
分类号 H03B28/00;G06F1/02;G06F1/035;G06G7/22;H03B23/00 主分类号 H03B28/00
代理机构 代理人
主权项
地址