发明名称 Programmable logic array with self correction of faults
摘要 An apparatus and a method to automatically locate defects and to automatically insert and personalize dummy lines in a PLA having latches controlling the cross points of the AND and OR array. Upon occurrence of an error in the PLA, a check signal is generated which interrupts normal operation of the PLA and which initiates a test procedure. The cross point latches are automatically loaded with test patterns and the output of the PLA is analyzed to locate the defective part, for example, a damaged cross point transistor, short circuited or open line. The dummy lines are repersonalized automatically to replace lines which are defective themselves or which are connected to defective crosspoints.
申请公布号 US4380811(A) 申请公布日期 1983.04.19
申请号 US19810254027 申请日期 1981.04.14
申请人 发明人
分类号 G06F7/00;G01R31/3185;G06F11/20;H03K19/177;(IPC1-7):G01R31/28;G11C29/00 主分类号 G06F7/00
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