| 摘要 |
PURPOSE:To shorten the time required for checking the cause of failure, by generating a test pattern signal and an expected pattern signal from an address signal, and providing a storage register of a pattern address on a circuit for comparing the test data signal with the expected pattern signal. CONSTITUTION:A storage part 1 of a test pattern applied to an IC6 to be tested receives a signal 10 of an address control part 3, and outputs a test pattern signal 9 and an expected pattern signal 8. Test data information 16 of the IC6, and the signal 8 are applied to a deciding circuit 7. In this case, a pattern address which has executed an instruction of the control part 3 is stored in a storage register 13, and when the circuit 7 has decided its failure, a control signal 15 of a write control part 5, and an address of the register 13 are stored in a storage device 14 together with the signal 10 and good/failure information 12 of every pin of the circuit 7. Accordingly, it is possible to know an address of a call instruction of a subroutine by reading the contents of the device 14, and it is possible to shorten the time required for checking the cause of failure of the IC to be tested. |
