| 摘要 |
PURPOSE:To obtain a memory storage operating at high speed by holding a semiconductor layer with narrow forbidden band width Eg by the wide layer of the same conduction type Eg, attaching electrodes connected to the carriers of an interface with a central layer at both ends of one layer and forming the carrier control electrode of the interface by the other layer. CONSTITUTION:Si Added N-Ga0.7Al0.3As 2 (0.05-1mum thickness) in 5X10<15>- 3X10<16>cm<-3>, GaAs not added 3 (0.02-0.1mum thickness) and Si added N- Ga0.7Al0.3As 4 in the same concentration as the layer 2 are stacked onto semi-insulating GaAs 1, and mutually lattice-aligned, and each junction section has conduction-band stage difference or valence-band stage difference sufficient for confining carriers into the layer 2 with small Eg. The layer 2 is connected to the electrodes 5, 6, and the carrier control electrode 7 is shaped onto the layer 4 in size shorter than a section between the electrodes 5, 6. It is preferable that concentration difference among the layers 2, 4 and 3 is five hundred times or higher, and it is effective that layers not added 2', 4' with wide Eg are formed to these interfaces within the range of 20- 60Angstrom thickness. According to this constitution, the speed of the operation of the cell is increased. |
