发明名称 REDUNDANT CODE ADDING SYSTEM
摘要 PURPOSE:To automatically form a redundant code, by using a redundant code as the redundant code added to a fixed memory information. CONSTITUTION:When a processor CPU starts operation according to a main program, transmission/reception via input/output circuits I/O1-I/On are performed, and while a specified data is accessed to a variable memory RAM2, the instructions of the main program are executed. First, the CPU is operated according to the preparation program of a fixed memory ROM1, the stored program is sequentially read out from each address of a fixed memory ROM2, a redundant code is formed based on the preparation program according to the logical value indicated with each bit and stored in the address of the variable memory RAM1 corresponding to the address of the fixed memory ROM2 reading out the program. At the end of execution of the preparation program, the redundant code of the variable memory RAM1 is read out, allowing to freely check the presence/absence of errors in each byte or word in the main program.
申请公布号 JPS5833759(A) 申请公布日期 1983.02.28
申请号 JP19810130256 申请日期 1981.08.21
申请人 YAMATAKE HONEYWELL KK 发明人 MOCHIZUKI KIYOSHI
分类号 G06F11/08 主分类号 G06F11/08
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