| 摘要 |
A modification of a phase-locked loop comprises incorporating a variable delay element in the feedback path from the oscillator to the phase comparator. The delay is controlled by the signal at the input to the oscillator, and allows two phase-locked loops having different input delays to be interconnected and such that they stabilise at a common frequency. This arrangement may be used in a network of interconnected oscillator terminals to allow the terminals to synchronise even when only indirect paths exist between them. It is therefore highly fault tolerant. |
