发明名称 |
IMAGE PROCESSOR |
摘要 |
<p>An image processor having cores realizes memory access more efficient than conventional. The image processor which performs pipe-line processings transfers data between an arithmetic operation unit (10) constituted of cores for performing arithmetic operation for processing and an external memory (2) by using a memory access unit (20). The memory access unit (20) includes an access schedule storage section (22) for storing the types of data transfer for every stage. The data transfer is carried out according to the contents stored in the access schedule storage section (22). A system control unit (30) sets the type of data transfer at each stage in the access schedule storage section (22) at the previous stage. Hence, the type of data transfer can be flexibly changed, and therefore the memory access unit (20) transfers only the necessary data at every stage without arbitration.</p> |
申请公布号 |
WO9967742(A1) |
申请公布日期 |
1999.12.29 |
申请号 |
WO1999JP03426 |
申请日期 |
1999.06.25 |
申请人 |
MATSUSHITA ELECTRIC INDUSTRIAL CO., LTD.;MORISHIGE, TAKAYUKI |
发明人 |
MORISHIGE, TAKAYUKI |
分类号 |
G06T1/20;H04N19/423;H04N19/436;H04N19/50;H04N19/503;H04N19/51;H04N19/61;H04N19/625;H04N19/91;(IPC1-7):G06T1/20;H04N7/32;G06F12/00 |
主分类号 |
G06T1/20 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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