发明名称 |
METHOD OF DESIGNING SEMICONDUCTOR FABRICATION FACTORY AND DESIGN SIMUMATION APPARATUS FOR PERFORMING THE SAME |
摘要 |
In a design method of a semiconductor manufacturing factory, reference information with respect to a facility to be installed in the semiconductor manufacturing factory is received. Verification items required for actually operating the facility are set. Design verification with respect to the verification items is performed to check a design error of a basic design in accordance with the reference information. Therefore, the method can reduce costs for modifying and remodeling the design. |
申请公布号 |
KR20160099250(A) |
申请公布日期 |
2016.08.22 |
申请号 |
KR20150021456 |
申请日期 |
2015.02.12 |
申请人 |
SAMSUNG ELECTRONICS CO., LTD. |
发明人 |
PARK, SEO RA;KIM, SANG YONG |
分类号 |
G06F17/50 |
主分类号 |
G06F17/50 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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