发明名称 DEBUGGING DEVICE FOR MICROCOMPUTER
摘要 PURPOSE:To enable to verify a reassembled program, by replacing an arbitrary area on an additional memory with the same part of the batch-processed system memory, so as to test on-line. CONSTITUTION:An output of digital switches 711 and 714 is OR-connected corresponding to the same bit, either of them is energized with an output of a counter 73 and the set output is outputted to a coincidence discriminator 72. A CPU address bus 4 is inputted to one of the discriminator 72 from a CPU1, and a logical ''1'' output is given to the output of the discriminator 72 when both inputs are coincident. An output of digital switches 712 and 713 is OR-connected corresponding to the same bit, the output is connected to the corresponding bit line of a CPU data bus 5, and the set output is give on the CPU data bus 5 with the output of an octal notation counter 73. The octal notation counter 73 counts the output pulse of an OR gate 77 and advances as ''1'', ''2'', ''3''-''7'' from ''0'' and returns to ''0''.
申请公布号 JPS57153353(A) 申请公布日期 1982.09.21
申请号 JP19810038896 申请日期 1981.03.18
申请人 MITSUBISHI DENKI KK 发明人 NAKANO NOBUMASA
分类号 G06F11/28;G06F11/36 主分类号 G06F11/28
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