发明名称 INFINITE PHASE SHIFTER
摘要 PURPOSE:To achieve high-speed control over the extent of a phase shift by reducing insertion loss by varying the gains of the 1st and 2nd gate input signals by gate biases by using a dual gate FET, and weighting and synthesizing them. CONSTITUTION:After an input signal is branched into two, the phase of one branched signal is shifted by 90 deg. through a pi/2 phase shifter 8, amplitude and polarity switching are performed by balanced modulators consisting of elements 7, 9 and 10, and 7', 9' and 10', and two sequence of signals are synthesized at a part 11 with a 90 deg. phase difference. Through the operation of the former modulator, the input signal to the branching circuit 7 is branched into two, and one signal is shifted in phase by 180 deg. through a pi phase shifter 9 and inputted to the 1st and 2nd gates of a dual gate FET10 to weight and synthesize two 180 deg. out-of-phase signals. The FET has gains to both the gate inputs and those gains are adjusted by bias voltages of both the gates, so the 1st and 2nd gate bias voltages VG1 and VG2 are controlled to weight and synthesize the input signal. The latter modulator has the same constitution.
申请公布号 JPS57143916(A) 申请公布日期 1982.09.06
申请号 JP19810028382 申请日期 1981.03.02
申请人 NIPPON DENSHIN DENWA KOSHA 发明人 ICHIKAWA TAKAAKI
分类号 H03H11/20;(IPC1-7):03H11/20 主分类号 H03H11/20
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