| 摘要 |
<p>A semiconductor memory device constituted by an MOS transistor which has a control gate (CG) and a floating gate (FG) capable of storing data. An erase gate (EG) is further provided to discharge electrons from the floating gate by field emission. The semiconductor memory device is further provided with a first voltage supply circuit (Er, Trej, Rej, lj, CVprog, Tcj) for supplying a voltage of higher level for erasing the data to the erase gate and a second voltage supply circuit (Tri, Trpi, Oi, CVprog, CVprog) for supplying a voltage of low level to the control gate.</p> |
