发明名称 BUS INTERFACE DEVICE
摘要 PURPOSE:To realize simultaneous allotment of plural addresses, by fetching a data out of a bus only in case coincidence is obtained between the address inherent to each device and the address delivered to the bus and also when the data fetching conditions is satisfied. CONSTITUTION:An address storage part 11 that stores plural addresses allotted to each device plus condition deciding circuits 19 and 20 that decide the data fetching conditions are provided to bus interface devices 20-2m. An address is read out of the part 11 and compared with an address on an address bus 4 through a collating circuit 10 to detect coincidence between them. Then the data fetching conditions 18 designated by the own processor is collated with the selection information 16 given from the data transmission side (a preceding device) through the condition deciding circuit 19 to detect the satisfaction of the data fetching conditions. Then the data on a data bus 5 is fetched only in case coincidence is obtained between the above-mentioned addresses and also when the deciding circuit 20 detects that the data fetching conditions is satisfied.
申请公布号 JPS5797134(A) 申请公布日期 1982.06.16
申请号 JP19800172799 申请日期 1980.12.08
申请人 NIPPON DENSHIN DENWA KOSHA 发明人 ICHIKAWA HARUHISA;IMASE MAKOTO
分类号 G06F13/14;G06F12/06 主分类号 G06F13/14
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