发明名称 PROCESSING DEVICE
摘要 PURPOSE:To always display a relative address, and to raise a debug operation efficiency, by subtracting the contents of a register which is capable of setting a prescribed value, from the contents of an instruction address register. CONSTITUTION:An output of an instruction address register 1 which is operated as a program counter is divided into two, one is inputted to a main memory 3, and the main memory 3 reads out an instruction of an absolute address by the count number of the instruction address register 1, stores it in an instruction register 4, and executes the instruction. Also, said other output is inputted to one terminal of a subtracting circuit 6. To a register 5, a necessary value (head address value) is set. The contents of the register 5 are subtracted from the contents of the instruction address register 1 by the subtracting circuit 6, and its result is displayed on a lamp displaying circuit. The contents of this display are a relative address in case a program and a module are being executed.
申请公布号 JPS5797145(A) 申请公布日期 1982.06.16
申请号 JP19800173029 申请日期 1980.12.08
申请人 FUJITSU KK 发明人 BABA YASUO
分类号 G06F9/30;G06F9/355;G06F11/28;G06F11/36 主分类号 G06F9/30
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