发明名称 DETECTING CIRCUIT FOR OUT OF SYNCHRONIZATION OF PHASE SYNCHRONIZING CIRCUIT
摘要 PURPOSE:To detect correctly out of synchronization of VFO circuit for a recording method to an extent that a PLO clock becomes >=2 data bits by comparing directly a detection timing signal issued from the timing signal for data processing and controlling which is the output form VFO circuit with a PLO clock. CONSTITUTION:The circuit is attached with a first device for forming the timing for detecting out of synchronization, and a second device 40' for checking the phase of a clock signal for a phase-locked oscillator (PLO) which is the input signal to a phase-synchronizing circuit (VFO) 20 in the detection timing to detect out of synchronization. Thus, the circuit 40' for detecting out of synchronization forms the timing for detecting out of synchronization from the data processing and controlling signal and acts to turn the error signal to '1' when the PLO clock is raised in the detection timing so as to eliminate the use of the output signal of a demodulator circuit 30' and to detect surely the out of synchronization for the VFO circuit even when the period of the PLO clock becomes larger than '2' data bits.
申请公布号 JPS63184965(A) 申请公布日期 1988.07.30
申请号 JP19870015192 申请日期 1987.01.27
申请人 HITACHI LTD 发明人 TAKEUCHI TAKIICHI;NISHINA MASATOSHI
分类号 G11B20/14;H03L7/08;H03L7/095 主分类号 G11B20/14
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