| 摘要 |
PURPOSE:To permit the control of the load current in a circuit, by a method wherein a load element is composed of depletion-mode FETs and resistor elements consisting of the integral number of the FETs in a master slice system device and the method of connecting the FETs and resistor elements is changed. CONSTITUTION:For example, a basic cell 58 forming an inverter circuit is composed of two FETs, 51,52 and two resistor elements 57, for example. As the load elements, the D type FET51 and resistor elements 57 are used by connecting the resistor elements 57 to the D type FET51. The connecting method is made to be modified by changing the wiring pattern. In this way, for example, when the resistance value of the resistor 57 is set at 25kOMEGA, the load resistance values can be changed to 25kOMEGA, 50kOMEGA and 12.5OMEGA, for one resistor, two series-connected resistors, and two parallel-connected resistors respectively. In this way, circuits having different load currents can be composed without changing the FET51 design and by using the same master slice and the number of designing processes can be decreased. |
