Decoding logic for frequency shift keying receiver

摘要

A radio receiver employing paired signal paths with frequency shift keying. In each signal path pair in which demodulated signals in quadrature are produced, the outputs of the limiting amplifiers are connected to two pairs of flip-flops so that the phase changes in the amplifier outputs are indicated. The outputs of the flip-flops are selectively summed in two gates to drive the inputs of a further flip-flop the output of which is the decoded output signal.