| 摘要 |
PURPOSE:To facilitate the timing control and at the same time realize the free setting of the timing for a memory, by generating a timing signal based on the control timing information which is stored in the memory. CONSTITUTION:With arrival of a memory start signal SSS, a counter K1 counts the reference clocks SCL. When this count value is equal to the value of a register R1, a control circuit S2 is started with the output of a comparator H1. As a result, the register CR1 is set to deliver a low address signal. Other outputs of the register CR1 control a multiplexer M1 and supply the value of a register R2 to the comparator H1. In case the count value of the counter K1 is equal to the value of a register R3, an address switch signal is produced from the CR2. When the value of a register R5 equals the count value of the K1, a column address signal is produced from the R3 to execute the timing of the memory reading. Then the data is read out of the memory. |
