发明名称 MICROPROCESSOR
摘要 <p>PURPOSE:To incorporate a cash memory, by constituting the cash memory so as to function as a cash as well as an associative memory. CONSTITUTION:The address data within a semiassociative cash 12 is selected by a lower bit gamma and its upper bit beta of a memory address which is set to a memory address register 13. Then the output of selection is supplied to an input Y of a comparator 41. On the other hand, an upper bit alpha of the memory address is supplied to an input terminal X of the comparator 41. If a coincidence of comparison is obtained here, an output Z at te DATA side of the cash 12 selected by the bits beta and gamma is delivered to an instruction register 14. In the same way, the data fetched from a main storage is stored in the DATA side of the entry designated by the beta and gamma of the register 13. At the same time, the bit alpha of the register 13 at that time is stored in an ADRS. In such way, the cash 12 has the functions of cash memory together with an associative memory.</p>
申请公布号 JPS5744280(A) 申请公布日期 1982.03.12
申请号 JP19800118735 申请日期 1980.08.28
申请人 TOKYO SHIBAURA DENKI KK 发明人 KINOSHITA TSUNEO
分类号 G06F12/08;G06F15/78 主分类号 G06F12/08
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