| 摘要 |
PURPOSE:To increase an operation speed in case of calculating a function, etc., by reading out contents of a specific register into a buffer, and indirectly designating an address to an RAM. CONSTITUTION:Each register of X, Y and Z is provided on an RAM5, and a data which is read out from the RAM5 is inputted to an operating circuit 17. This circuit 17 executes an operatio to an input data, stores its result in the RAM5, and also inputs it to a buffer 18. This buffer 18 reads the input data by prescribed timing, and its stored data is inputted to a B-counter 13 through a gate circuit 19. Subsequently, the uppermost bits of A and B counters 12, 13 are inputted to one-shot circuits 20, 21 , outputs of the circuit 20, 21 and a coincidence output of a coinciding circuit 10 are inputted to a latching circuit 23 through an OR circuit 22, and the circuit 23 delays the input signal by 1 digit portion, and outputs it to an ROM address part 3. |
