| 摘要 |
<p>PURPOSE:To reduce the capacity with respect to a substrate by forming an electrode-leading pad on the N layer on a P type Si substrate through SiO2. CONSTITUTION:On a P type Si substrate, a field oxide film 14 is selectively formed, SiO2 15 is piled thereon, and a polycrystalline Si gate electrode 16 is formed. The electrode 16 is used as a mask to perform etching to form a gate oxide film 7. Subsequently, the oxide film 14 and the electrode 16 are used as masks to form N<+> layers 18-20. CVDSiO2 21 is piled thereon and opened, and Al is deposited by evaporation and patterned to form a lead electrode 23 on the SiO2 21 corresponding to the N<+> layer 20. In this case, the electrode-leading pad 22 is formed so as to be smaller than the N<+> layer 20. By said constitution, the capacity of the film 21 is connected with that of N<+> layer 20 in series, so that the capacity decreases. Accordingly, the parasitic MOS effect of the lead electrode wiring is restrained. In addition, the N<+> layer 20 can be formed simultaneously with the source and drain 18 and 19, and because the SiO2 21 is a thin film, the manufacturing time is shortened. Accordingly, an effective pad can be obtained.</p> |
