发明名称 OUTPUT ERROR COMPENSATING CIRCUIT OF DIGITAL-TO-ANALOG CONVERTER
摘要 PURPOSE:To correct an output error by analogically adding or subtracting a digital signal which has been generated by the bit having an error, to an analog output. CONSTITUTION:For instance, in case when a digital signal is vibrating around ''100...0'', a signal of the most significant bit MSB is taken out through the buffer amplifier 18, and it is added to an analog signal which has been D/A-converter by the switching circuit 12 and the ladder resistance 13. The signal of MSB is voltage- divided by the resistance circuit network in accordance with magnitude of an error which is caused by the ladder resistance 13, and relation of magnitude against the standard resistance, and it is input to the operational amplifier 16 so as to be added or subtracted.
申请公布号 JPS56141620(A) 申请公布日期 1981.11.05
申请号 JP19800046110 申请日期 1980.04.08
申请人 CASIO COMPUTER CO LTD 发明人 ISHIKAWA TOMOHISA
分类号 H03M1/10;H03M1/08;H03M1/66;(IPC1-7):03K13/02 主分类号 H03M1/10
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