发明名称 SCRAMBLE CIRCUIT FOR CHROMINANCE SUB-CARRIER SIGNAL
摘要 PURPOSE:To simplify circuit constitution by generating the scramble burst signal of an always constant phase from a horizontal synchronizing signal by means of a scramble burst signal generating circuit and adding the scramble burst signal to a video signal, from which a color burst signal is removed, by means of a scramble burst signal inserting circuit. CONSTITUTION:The inputted video signal is branched into two video signals. One video signal is inputted to a horizontal synchronizing signal detecting circuit 1 and the horizontal synchronizing signal is separated. A color burst signal removing circuit 2 removes only the color burst signal of the other video signal, which is one of the branched two video signals, with obtaining the horizontal synchronizing signal from the detecting circuit 1 as a clock signal. A scramble burst signal generating circuit 3 always generates the same burst signal, with obtaining the horizontal synchronizing signal from the detecting circuit 1 as the clock signal, after a constant time from the rising of this clock signal. Then, this burst signal is added to the video signal, from which the color burst signal is removed, in a scramble burst signal inserting circuit 4. Thus, the circuit constitution can be simplified.
申请公布号 JPS6446396(A) 申请公布日期 1989.02.20
申请号 JP19870202737 申请日期 1987.08.14
申请人 NEC CORP 发明人 KANEKO AKIRA
分类号 H04N11/00;G06F21/10;H04N7/167;H04N11/24 主分类号 H04N11/00
代理机构 代理人
主权项
地址
您可能感兴趣的专利