| 摘要 |
PURPOSE:To perform stable operation without causing malfunction up to an extremely high frequency by using a one-phase pulse signal for the operation of a shift register. CONSTITUTION:At the static part of a half-bit shift register, P channel MOSFETs 21 and 22 and N channel MOSFETs 23 and 24 are interposed in series between FETs 22 and 23 is used as output terminal 25, which is connected to gates of FETs 22 and 23 through inverter 26. Between output terminal 19 of the dynamic part and GND, N channel MOSFET27 is further connected in parallel. The input terminal of inverter 26 and the gate of FET27 are supplied with signal A from output terminal 15, the gate of FET24 is supplied with signal B from output terminal 19, and the gate of FET21 is further supplied to one-phase pulse signal phi. Then when input signal IN varies synchronizing with the fall of phi, output signal OUT varies synchronizing with the fall of phi a half bit delayed behind phi. |
