发明名称 SEMICONDUCTOR MEMORY DEVICE
摘要 PURPOSE:To secure the selection of a small number of redundant cells in place of the defective cells through a simple means, by selecting the redundant memory cell array provided per word or column via the defective word or the ROM storing the column line address information each. CONSTITUTION:The word line address containing the defective bit is decided with application of address signals A0 and A1 and via load address buffer 16. Then a high level is secured for the output of ROM decoder 36 storing the defective word line address information. Thus the access is given to redundant memory cell array 34 and the like corresponding to the defective work line, and at the same time switch circuit 38 is opened via decoder 36. As a result, the clock of clock generator 30 is not applied to load address decoder 18, and the defective work lines of memory cell arrays 10 and 12 are never addressed. Thus a small number of redundant cells can be selected via a simple means in place of the defective cells.
申请公布号 JPS563499(A) 申请公布日期 1981.01.14
申请号 JP19790079819 申请日期 1979.06.25
申请人 发明人
分类号 G11C11/413;G11C29/00;G11C29/04 主分类号 G11C11/413
代理机构 代理人
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